1. Field of the Invention
This invention relates generally to the cell structure, device configuration and fabrication process of trench Punch-Through insulated gate bipolar transistor (PT IGBT) and trench Non Punch-Through insulated gate bipolar transistor (NPT IGBT). More particularly, this invention relates to an improved device configuration and process to manufacture PT IGBT and NPT IGBT with ESD (electrostatic discharge) protection having the characteristics of preventing emitter, gate and collector shortage issue from happening.
2. Description of the Related Art
In order to enhance the ESD protection for trench PT IGBT and NPT IGBT, many different configurations are disclosed in prior arts with G-E Clamp Diodes or G-C Clamp Diodes or with G-E and G-C Clamp Diodes for G-E and G-C protection, respectively. As shown in FIG. 1, a conventional trench PT IGBT cell of prior art with G-E Clamp Diodes for ESD protection is illustrated. The structure further comprises: a P+ substrate 100 coated with back metal 101 on its rear side as Collector; a moderately doped N epitaxial layer 102 sandwiched between a lightly doped N− epitaxial layer 103 and the P+ substrate 100; a plurality of trenches and at least a wider trench opened within N− epitaxial layer 103 and filled with polysilicon to respectively serve as trench gates 124 and at least a wider trench gate 124′ for gate connection over a layer of gate oxide 130; P base region 104 extending among said trench gates with N+ emitter regions 105 near its top surface between two adjacent trench gates 124; a doped polysilicon layer overlying a portion of the thin oxide layer 136 as ESD protection diodes comprising two back to back Zener diodes which arranged as n+/p/n+/p/n+. Through trench contacts 126 and 127, one cathode 145 of the ESD protection diode, as well as emitter region and base region, are all connected to emitter metal 132 while another cathode 145′ together with trench gate 124′ are connected to gate metal 134 through trench contacts 128 and 129. Specially, around the bottom of each trench emitter contact and trench base contact, a P+ area is formed to reduce the resistance between base region and metal plug filled in trench contacts.
Though trench contacts employed in this prior art have better connection stability and higher device density than planar contact used in other conventional art, it will still encounter another hazardous shortage issue, which happens between gate and emitter when trench contacts 127 and 128 are over etched through ESD protection diodes and thin oxide layer 136 and into P base region 104 during fabrication process, causing accordingly low yield and reliability issues, as shown in FIG. 2. Unfortunately, this shortage problem induced by over etching may also be found in cases when G-C clamp diodes are applied as well as in conventional trench NPT IGBT with protection diodes.
Accordingly, it would be desirable to provide a trench PT IGBT (or NPT IGBT) cell with improved configuration to avoid the shortage issue resulted from over etching.